Here's a wrap up of November's DFT-related news... for DFT talk and information go to DFT Digest or DFT Forum!
IIT team proposes joint approach for testing large SoC designs
GOEPEL electronic’s SCANFLEX® JTAG/Boundary Scan Platform now integrated into Aeroflex 5800 Series ATE System
Low-power design animates panel in Taiwan
SynTest Receives A Fundamental Patent on At-Speed Capture Invention for Scan ATPG
ECS research paper rated for industry impact
JTAG Technologies renowned JT 3705 Explorer goes USB
Perform Design-for-Test and Power Management at the RTL
Thinking out of the box: Expanding STC's impact with STIX (Guest commentary)
Free Calculator Determines ROI On PCB Design Software
Critical controller boards put on trial
Magma Named to Silicon Valley's Fastest-Growing Software & IT Companies in Deloitte's Technology Fast 50 Program for Fourth Consecutive Year
New SYSTEM CASCON™ Software Release Enhances In-System Programming and 3rd Party ATE Integration
XJTAG v2.0 boundary scan system sets new standard for PCB debug & test
Sunday, November 25, 2007
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