Here are some items from the last two weeks of June 2007 - Check out DFT Digest - The Real DFT for other discussion of Design for Test related subjects!
6/28/07 - ISS Group - LogicVision Customer Training, July 25-26 - Hmmm... I could use a vacation to Sweden!!!
6/27/07 - Technotime Integrates XJTAG Boundary Scan into Novel PCB Test Solution - Always a lot going on in the board test world...
6/26/07 - ATE group to devise interface standards - Standardization in the ATE community is as difficult as it is in the EDA world!
6/21/07 - Design for debugging: the unspoken imperative in chip design - To hell with test, design for debugging!!
6/20/07 - Designing "with" instead of "for" - Cadence is really pushing for designing "with" test, instead of "for" test. They have a point...
6/20/07 - Corelis Adds Boundary-Scan Scripting Support to its ScanExpress ... - a new feature that enables the user to create customized testing sessions.
6/20/07 - Boundary-scan development software continues to advance - JTAG Technology's Provision
6/18/07 - Inovys Achieves Top Ranking for Excellence in Customer Satisfaction - Inovys provides innovative yield enhancement, failure analysis, and design debug solutions for the semiconductor industry. Need to write up something at the main site on these guys...
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